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EP2A25F672C8 Whakatakotoranga Hangarau

FPGA - Field Programmable Gate Array CPLD - APEX II 2432 Macro 492 IOs

Huanga Hua Uara Huanga
Category Integrated Circuits (ICs) / FPGAs
Manufacturer Intel
Factory Lead Time 3 Weeks
Mounting Type Surface Mount
Surface Mount YES
Packaging Tray
JESD-609 Code e0
Moisture Sensitivity Level (MSL) 3 (168 Hours)
ECCN Code 3A001.A.7.A
HTS Code 8542.39.00.01
Technology CMOS
Terminal Position BOTTOM
Peak Reflow Temperature (Cel) 220
Terminal Pitch 1mm
[email protected] Reflow Temperature-Max (s) 30
JESD-30 Code S-PBGA-B672
Qualification Status Not Qualified
Number of I/O 492
Number of Inputs 480
Number of Logic Elements/Cells 24320
Number of Gates 2750000
Output Function MACROCELL
Length 27mm
RoHS Status Non-RoHS Compliant
Huanga Hua Uara Huanga
Part Status Active
RoHS Status ROHS3 Compliant
Pbfree Code yes
Package / Case 672-BBGA, FCBGA
Operating Temperature 0°C~85°C TJ
Series APEX II
Part Status Obsolete
Number of Terminations 672
Terminal Finish Tin/Lead (Sn/Pb)
Subcategory Field Programmable Gate Arrays
Voltage - Supply 1.425V~1.575V
Terminal Form BALL
Supply Voltage 1.5V
Reach Compliance Code compliant
Base Part Number EP2A25
Number of Outputs 480
Power Supplies 1.51.5/3.3V
Propagation Delay 1.94 ns
Programmable Logic Type LOADABLE PLD
Total RAM Bits 622592
Number of LABs/CLBs 2430
Height Seated (Max) 2.1mm
Width 27mm
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